Workflow & Meshing Updates in Ansys Fluent 2021 R1 – Webinar

From small to mid-sized companies to global organizations, companies of every size seek new ways for pioneering breakthrough innovations that are safer and more reliable to win the race to market.

Ansys 2021 R1 delivers significant improvements in simulation technology together with nearly unlimited computing power to help engineers across all industries reimagine product design and achieve product development goals that were previously thought impossible.

For fluids simulation in this release, products can be designed faster than ever before, thanks to major physics and productivity enhancements that build upon the tool’s ​already powerful workflow and meshing capabilities. Join PADT’s Senior Simulation Support & Application Engineer and fluids expert Sina Ghods for a look at what’s new in this release including: 

• Fluent User Interface Updates

      • Meshing Workflow Advancements

      • Combustion Applications

      • Turbomachinery Applications

      • Battery Modeling Applications

      • Multiphase and DPM Improvements

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All Things Ansys 080: 2020 Wrap-up & Predictions for Ansys in the New Year

 

Published on: January 25th, 2021
With: Eric Miller & PADT’s Ansys Support Team
Description:  

In this episode your host and Co-Founder of PADT, Eric Miller is joined by the simulation support team to look back at the past year of Ansys technology and make some predictions regarding what may happen in the year to come.

If you have any questions, comments, or would like to suggest a topic for the next episode, shoot us an email at podcast@padtinc.com we would love to hear from you!

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All Things Ansys 079: The State of Simulation for Additive Manufacturing

 

Published on: January 11th, 2021
With: Eric Miller & Brent Stucker
Description:  

In this episode your host and Co-Founder of PADT, Eric Miller is joined by Brent Stucker, the Director of Additive Manufacturing at Ansys to discuss the innovative capabilities of the Ansys additive suite of tools and it’s impact on the effectiveness of 3D printing for manufacturing and design.

If you have any questions, comments, or would like to suggest a topic for the next episode, shoot us an email at podcast@padtinc.com we would love to hear from you!

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All Things Ansys 078: Optimization & Automation Updates in Ansys 2020 R2 – OptiSLang

 

Published on: December 14th, 2020
With: Eric Miller & Josh Stout
Description:  

In this episode your host and Co-Founder of PADT, Eric Miller is joined by PADT’s Systems Support & Application Engineer Josh Stout for a discussion on how OptiSLang helps to increase the robustness and reliability of simulation, as well as a look at what new features are in the 2020 R2 updated version.

If you would like to learn more about this update, you can view Josh’s webinar on the topic here:

https://www.brighttalk.com/webcast/15747/458229

If you have any questions, comments, or would like to suggest a topic for the next episode, shoot us an email at podcast@padtinc.com we would love to hear from you!

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Optimization & Automation Updates in Ansys 2020 R2 – Webinar

Simulation is becoming an integral part of our customers’ product development processes, and new horizons await. By combining different physics into a multidisciplinary approach, phenomena can be investigated more holistically and optimized to a greater degree. Additionally, simulation processes can be standardized and shared across teams, allowing simulation novices to gain more direct access to simulation.

Time-consuming manual searches for the best and most robust design configuration can now be accelerated by adding state-of-the-art algorithms for design exploration, optimization, robustness and reliability analysis. Through the power of interactive visualization and artificial intelligence technologies, engineers and designers can gain a better understanding of their design and make the right decisions in less time.

The process integration and design optimization solution that enables all the above is Ansys optiSLang.

Join PADT’s Mechanical Application Engineer and Systems Expert Josh Stout for an exploration of this interconnected tool and what new capabilities are available in it’s 2020 R2 release.

Register Here

If this is your first time registering for one of our Bright Talk webinars, simply click the link and fill out the attached form. We promise that the information you provide will only be shared with those promoting the event (PADT).

You will only have to do this once! For all future webinars, you can simply click the link, add the reminder to your calendar and you’re good to go!

All Things Ansys 077: Multibody Dynamics Updates in Ansys Motion 2020 R2

 

Published on: November 30th, 2020
With: Eric Miller & Jim Peters
Description:  

In this episode your host and Co-Founder of PADT, Eric Miller is joined by PADT’s Senior Staff Technologist Jim Peters for a discussion on the new capabilities available within Ansys Motion 2020 R2. With an integration into Mechanical, users can take advantage of multi-use models resulting in substantial time savings.

If you would like to learn more about this update, you can view Jim’s webinar on the topic here:

https://www.brighttalk.com/webcast/15747/455203

If you have any questions, comments, or would like to suggest a topic for the next episode, shoot us an email at podcast@padtinc.com we would love to hear from you!

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Multibody Dynamics Updates in Ansys Motion 2020 R2 – Webinar

Ansys Motion, now in the Mechanical interface, is a third generation engineering solution based on an advanced multibody dynamics solver that enables fast and accurate analysis of rigid and flexible bodies and gives an accurate evaluation of physical events through the analysis of the mechanical system as a whole.

Ansys Motion uses four tightly integrated solving schemes (rigid body, flexible body, modal & meshfree EasyFlex) that give the user unparalleled capabilities to analyze in any combination imaginable. Large assemblies with millions of degrees of freedom can be studied with the effects of flexibility and contact included. With an integration into Mechanical, users can take advantage of multi-use models resulting in substantial time savings.

Join PADT’s Senior Staff Technologist, Jim Peters for an exploration of what this tool has to offer, and how seamlessly it integrates with the Ansys Mechanical interface.

Register Here

If this is your first time registering for one of our Bright Talk webinars, simply click the link and fill out the attached form. We promise that the information you provide will only be shared with those promoting the event (PADT).

You will only have to do this once! For all future webinars, you can simply click the link, add the reminder to your calendar and you’re good to go!

All Things Ansys 076: MAPDL – Elements, Contact & Solver Updates in Ansys 2020 R2

 

Published on: November 16th, 2020
With: Eric Miller & Ted Harris
Description:  

In this episode your host and Co-Founder of PADT, Eric Miller is joined by PADT’s Simulation Support Manager Ted Harris for a discussion on what’s new in the Ansys Mechanical APDL 2020 R2 release.

If you would like to learn more about this update, you can view Ted’s webinar on the topic here:

https://www.brighttalk.com/webcast/15747/452033

If you have any questions, comments, or would like to suggest a topic for the next episode, shoot us an email at podcast@padtinc.com we would love to hear from you!

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MAPDL – Elements, Contact & Solver Updates in Ansys 2020 R2 – Webinar

The Ansys finite element solvers enable a breadth and depth of capabilities unmatched by anyone in the world of computer-aided simulation. Thermal, Structural, Acoustic, Piezoelectric, Electrostatic and Circuit Coupled Electromagnetics are just an example of what can be simulated. Regardless of the type of simulation, each model is represented by a powerful scripting language, the Ansys Parametric Design Language (APDL).

APDL is the foundation for all sophisticated features, many of which are not exposed in the Workbench Mechanical user interface. It also offers many conveniences such as parameterization, macros, branching and looping, and complex math operations. All these benefits are accessible within the Ansys Mechanical APDL user interface.

Join PADT’s Simulation Support Manager, Ted Harris for a look at what’s new for MAPDL in Ansys 2020 R2, regarding:

  • Contact Modeling & Robustness
  • Elements
  • Post Processing
  • Solver Components
  • And Much More

Register Here

If this is your first time registering for one of our Bright Talk webinars, simply click the link and fill out the attached form. We promise that the information you provide will only be shared with those promoting the event (PADT).

You will only have to do this once! For all future webinars, you can simply click the link, add the reminder to your calendar and you’re good to go!

All Things Ansys 075: Optical System Design & Disruption in Ansys SPEOS 2020 R2

 

Published on: November 2nd, 2020
With: Eric Miller & Robert McCathren
Description:  

In this episode your host and Co-Founder of PADT, Eric Miller is joined by PADT’s Application Engineer Robert McCathren for a look at how Ansys 2020 R2 empowers SPEOS users to go further than ever before with enhancements that improve the handling of complex sensors, project preview and computation.

If you would like to learn more about this update, you can view Robert’s webinar on the topic here:

https://www.brighttalk.com/webcast/15747/449021

If you have any questions, comments, or would like to suggest a topic for the next episode, shoot us an email at podcast@padtinc.com we would love to hear from you!

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Introducing Level Up – An Ansys Mechanical Virtual Conference

PADT & Ansys are excited to announce Level Up with Ansys Mechanical, a free virtual technical conference on Wednesday, December 2, 2020 at 10 a.m. EST.

For the past 50 years, Ansys Mechanical continues to be the go-to finite element analysis platform for structural analysis, and they’re just getting warmed up. Join visionary Ansys product development, product management and engineering leaders as they provide expert insights on Mechanical’s technology advances and preview the platform’s future.

From those engineers looking to boot up their simulation experience to those seeking to step up their simulation skills, and even those operating in “beast mode”, who execute large and complex workflows, this action-packed event showcases how Mechanical radically transforms product design.

Highlights include: 

  • Learn the latest with scripting and automation to save valuable time
  • Discover how to lightweight product designs with structural optimization methods
  • Understand how to couple multiple physics to assess performance in the real world
  • And so much more

Catch the thought-provoking plenary presentation, engage with Ansys’ brightest during the live Q&A, and interact with fellow engineers during live polls. 

Register Here

Introducing the All-new Ansys Discovery

Leveraging the all-new Ansys Discovery product early in your product design processes will drive substantial gains in engineering productivity, spur innovation and increase your product’s overall performance.

And we can prove it.

Register Here: https://bit.ly/3fV40gK

Join #Ansys on July 29th, 11:00 am EDT for this virtual launch event where visionary leaders will deliver dynamic insights on the product, perform cutting-edge technology demonstrations and share real-world customer successes.

Changes to Licencing at ANSYS 2020R1

There are three main goals of the licensing changes in the latest release of ANSYS:

  • Deliver Ansys licensing using the FlexLM industry standard
  • Eliminate the Ansys licensing interconnect
  • Provide modular licensing options that are easier to understand
  • Finally – and this is the whopper (or Double Double if you’re an In-N-Out kind of analogy person) – this new licensing model eliminates the need for upgrading the Ansys License Manager with every software update. (please pause for shock recovery)
If you’re still shocked and would to like see a “shocked groundhog” compilation, check this out.

Why is this significant? Well, this was always a sticking point for our customers when upgrading from one version to the next.

Here’s how that usually plays out:

  1. Engineers eager to try out new features or overcome software defects, download the software and install it on their workstations.
    1. Surprise – software throws an obscure licensing error.
    2. Engineer notifies IT or Ansys Channel partner of issue.
    3. After a few calls, maybe a screenshare or two, its determined that the license server needs to be upgraded.
    4. The best-case scenario – IT or PADT Support can get it installed in a few minutes and engineer can be on his way.
    5. The usual scenario – it will take a week to schedule downtime on the server and notify all stakeholders and the engineer is left to simmer on medium-low until those important safeguards are handled.

What does this all mean?

  • Starting in January 2020, all new Ansys keys issued will be in the new format and will require upgrading to the 2020R1 License manager. This should be the last mandatory license server upgrade for a while.
  • Your Ansys Channel Partner will contact you ahead of your next renewal to discuss new license increments and if there are any expected changes.
  • Your IT and Ansys support team will be celebrating in the back office the last mandatory Ansys License Manager upgrade for a while.

How to upgrade the Ansys License Manager?

Download the latest license manager through the Ansys customer portal:

Follow installation instructions and add the latest license file:

  • Ansys has a handy video on this here
  • Make sure that you run the installed as an administrator for best results.

Make sure license server is running and has the correct licenses queued:

  • Look for the green checkmark in the license management center window.
  • Start your application and make sure everything looks good.

This was a high-level flyover of the new Ansys Licensing released with version 2020R1. For specifics contact your PADT Account manager or support@padtinc.com .

Making Sense of DC IR Results in Ansys SIwave

In this article I will cover a Voltage Drop (DC IR) simulation in SIwave, applying realistic power delivery setup on a simple 4-layer PCB design. The main goal for this project is to understand what data we receive by running DC IR simulation, how to verify it, and what is the best way of using it.

And before I open my tools and start diving deep into this topic, I would like to thank Zachary Donathan for asking the right questions and having deep meaningful technical discussions with me on some related subjects. He may not have known, but he was helping me to shape up this article in my head!

Design Setup

There are many different power nets present on the board under test, however I will be focusing on two widely spread nets +1.2V and +3.3V. Both nets are being supplied through Voltage Regulator Module (VRM), which will be assigned as a Voltage Source in our analysis. After careful assessment of the board design, I identified the most critical components for the power delivery to include in the analysis as Current Sources (also known as ‘sinks’). Two DRAM small outline integrated circuit (SOIC) components D1 and D2 are supplied with +1.2V. While power net +3.3V provides voltage to two quad flat package (QFP) microcontrollers U20 and U21, mini PCIE connector, and hex Schmitt-Trigger inverter U1.

Fig. 1. Power Delivery Network setting for a DC IR analysis

Figure 1 shows the ‘floor plan’ of the DC IR analysis setup with 1.2V voltage path highlighted in yellow and 3.3V path highlighted in light blue.

Before we assign any Voltage and Current sources, we need to define pin groups for all nets +1.2V, +3.3V and GND for all PDN component mentioned above. Having pin groups will significantly simplify the reviewing process of the results. Also, it is generally a good practice to start the DC IR analysis from the ‘big picture’ to understand if certain component gets enough power from the VRM. If a given IC reports an acceptable level of voltage being delivered with a good margin, then we don’t need to dig deeper; we can instead focus on those which may not have good enough margins.

Once we have created all necessary pin groups, we can assign voltage and current sources. There are several ways of doing that (using wizard or manual), for this project we will use ‘Generate Circuit Element on Components’ feature to manually define all sources. Knowing all the components and having pin groups already created makes the assignment very straight-forward. All current sources draw different amount of current, as indicated in our setting, however all current sources have the same Parasitic Resistance (very large value) and all voltage source also have the same Parasitic Resistance (very small value). This is shown on Figure 2 and Figure 3.

Note: The type of the current source ‘Constant Voltage’ or ‘Distributed Current’ matters only if you are assigning a current source to a component with multiple pins on the same net, and since in this project we are working with pins groups, this setting doesn’t make difference in final results.

Fig. 2. Voltage and Current sources assigned
Fig. 3. Parasitic Resistance assignments for all voltage and current sources

For each power net we have created a voltage source on VRM and multiple current sources on ICs and the connector. All sources have a negative node on a GND net, so we have a good common return path. And in addition, we have assigned a negative node of both voltage sources (one for +1.2V and one for +3.3V) as our reference points for our analysis. So reported voltage values will be referenced to that that node as absolute 0V.

At this point, the DC IR setup is complete and ready for simulation.

Results overview and validation

When the DC IR simulation is finished, there is large amount of data being generated, therefore there are different ways of viewing results, all options are presented on Figure 4. In this article I will be primarily focusing on ‘Power Tree’ and ‘Element Data’. As an additional source if validation we may review the currents and voltages overlaying the design to help us to visualize the current flow and power distribution. Most of the time this helps to understand if our assumption of pin grouping is accurate.

Fig. 4. Options to view different aspects of DC IR simulated data

Power Tree

First let’s look at the Power Tree, presented on Figure 5. Two different power nets were simulated, +1.2V and +3.3V, each of which has specified Current Sources where the power gets delivered. Therefore, when we analyze DC IR results in the Power tree format, we see two ‘trees’, one for each power net. Since we don’t have any pins, which would get both 1.2V and 3.3V at the same time (not very physical example), we don’t have ‘common branches’ on these two ‘trees’.

Now, let’s dissect all the information present in this power tree (taking in consideration only one ‘branch’ for simplicity, although the logic is applicable for all ‘branches’):

  • We were treating both power nets +1.2V and +3.3V as separate voltage loops, so we have assigned negative nodes of each Voltage Source as a reference point. Therefore, we see the ‘GND’ symbol ((1) and (2)) for each voltage source. Now all voltage calculations will be referenced to that node as 0V for its specific tree.
  • Then we see the path from Voltage Source to Current Source, the value ΔV shows the Voltage Drop in that path (3). Ultimately, this is the main value power engineers usually are interested in during this type of analysis. If we subtract ΔV from Vout we will get the ‘Actual Voltage’ delivered to the specific current source positive pin (1.2V – 0.22246V = 0.977V). That value reported in the box for the Current Source (4). Technically, the same voltage drop value is reported in the column ‘IR Drop’, but in this column we get more details – we see what the percentage of the Vout is being dropped. Engineers usually specify the margin value of the acceptable voltage drop as a percentage of Vout, and in our experiment we have specified 15%, as reported in column ‘Specification’. And we see that 18.5% is greater than 15%, therefore we get ‘Fail_I_&_V’ results (6) for that Current Source.
  • Regarding the current – we have manually specified the current value for each Current Source. Current values in Figure 2 are the same as in Figure 5. Also, we can specify the margin for the current to report pass or fail. In our example we assigned 108A as a current at the Current Source (5), while 100A is our current limit (4). Therefore, we also got failed results for the current as well.
  • As mentioned earlier, we assigned current values for each Current Source, but we didn’t set any current values for the Voltage Source. This is because the tool calculates how much current needs to be assigned for the Voltage Source, based on the value at the Current Sources. In our case we have 3 Current Sources 108A, 63A, 63A (5). The sum of these three values is 234A, which is reported as a current at the Voltage Source (7). Later we will see that this value is being used to calculate output power at the Voltage Source.  
Fig. 5. DC IR simulated data viewed as a ‘Power Tree’

Element Data

This option shows us results in the tabular representation. It lists many important calculated data points for specific objects, such as bondwire, current sources, all vias associated with the power distribution network, voltage probes, voltage sources.

Let’s continue reviewing the same power net +1.2V and the power distribution to CPU1 component as we have done for Power Tree (Figure 5). The same way we will be going over the details in point-by-point approach:

  • First and foremost, when we look at the information for Current Sources, we see a ‘Voltage’ value, which may be confusing. The value reported in this table is 0.7247V (8), which is different from the reported value of 0.977V in Power Tree on Figure 5 (4). The reason for the difference is that reported voltage value were calculated at different locations. As mentioned earlier, the reported voltage in the Power Tree is the voltage at the positive pin of the Current Source. The voltage reported in Element Data is the voltage at the negative pin of the Current Source, which doesn’t include the voltage drop across the ground plane of the return path.

To verify the reported voltage values, we can place Voltage Probes (under circuit elements). Once we do that, we will need to rerun the simulation in order to get the results for the probes:

  1. Two terminals of the ‘VPROBE_1’ attached at the positive pin of Voltage Source and at the positive pin of the Current Source. This probe should show us the voltage difference between VRM and IC, which also the same as reported Voltage Drop ΔV. And as we can see ‘VPROBE_1’ = 222.4637mV (13), when ΔV = 222.464mV (3). Correlated perfectly!
  2. Two terminals of the ‘VPROBE_GND’ attached to the negative pin of the Current Source and negative pin of the Voltage Source. The voltage shown by this probe is the voltage drop across the ground plane.

If we have 1.2V at the positive pin of VRM, then voltage drops 222.464mV across the power plane, so the positive pin of IC gets supplied with 0.977V. Then the voltage at the Current Source 0.724827V (8) being drawn, leaving us with (1.2V – 0.222464V – 0.724827V) = 0.252709V at the negative pin of the Current Source. On the return path the voltage drops again across the ground plane 252.4749mV (14) delivering back at the negative pin of VRM (0.252709V – 0.252475V) = 234uV. This is the internal voltage drop in the Voltage Source, as calculated as output current at VRM 234A (7) multiplied by Parasitic Resistance 1E-6Ohm (Figure 3) at VRM. This is Series R Voltage (11)

  • Parallel R Current of the Current source is calculated as Voltage 724.82mV (8) divided by Parasitic Resistance of the Current Source (Figure 3) 5E+7 Ohm = 1.44965E-8 (9)
  • Current of the Voltage Source report in the Element Data 234A (10) is the same value as reported in the Power Tree (sum of all currents of Current Sources for the +1.2V power net) = 234A (7). Knowing this value of the current we can multiple it by Parasitic Resistance of the Voltage Source (Figure 3) 1E-6 Ohm = (234A * 1E-6Ohm) = 234E-6V, which is equal to reported Series R Voltage (11). And considering that the 234A is the output current of the Voltage Source, we can multiple it by output voltage Vout = 1.2V to get a Power Output = (234A * 1.2V) = 280.85W (12)
Fig. 6. DC IR simulated data viewed in the table format as ‘Element Data’

In addition to all provided above calculations and explanations, the video below in Figure 7 highlights all the key points of this article.

Fig. 7. Difference between reporting Voltage values in Power Tree and Element Data

Conclusion

By carefully reviewing the Power Tree and Element Data reporting options, we can determine many important decisions about the power delivery network quality, such as how much voltage gets delivered to the Current Source; how much voltage drop is on the power net and on the ground net, etc. More valuable information can be extracted from other DC IR results options, such as ‘Loop Resistance’, ‘Path Resistance’, ‘RL table’, ‘Spice Netlist’, full ‘Report’. However, all these features deserve a separate topic.

As always, if you would like to receive more information related to this topic or have any questions please reach out to us at info@padtinc.com.